[Simh] TMXR/UC15 documentation?

[Timothe Litt]

On 17-Jul-18 16:29, Lars Brinkhoff wrote:

>
> It's mostly used to allow direct access to PDP-11 main memory.
>
> Maybe a longer explanation is in order.
>
> The MIT AI PDP-10 had a special device attached called the Rubin 10-11
> interface.  It allowed connecting up to eight PDP-11s.  The interface
> mapped the PDP-11 memories into the PDP-10 address space.  As far as I
> know (there's not much in the way of documentation), there was only
> shared memory, no interrupts or any other features.  The PDP-10 always
> initiates accesses.  The 11s could not access PDP-10 memory.
>
The DEC version of this is the DL10 - at least for the KA/KI.  Also
supported on the
KLs with external memory/IO buses.  This provides a Unibus to PDP-10 memory
window.  IIRC, up to 4 Unibuses/DL10.  Either side could write -10
memory.  The
DL10 connects to the IO bus (for configuration, interrupt status/enables,
etc, and the electronic finger (which triggers the boot rom - which is
how the 10 gets
control for load/dump.  And the memory bus for the memory references -
which to
the Unibus, look like memory.  We used this for ANF-10 network front
ends; some
environments also connected -15s to the Unibus.

You should think about what you describe as a subset of the DL10, which
someone will
eventually want to add to the KA/KI emulations.

For the KL10, the DTE20 uses a somewhat different architecture - I don't
have time to
describe it now.

I think the manuals for both are on Bitsavers - but I have a meeting to
get to...

It's pretty clear that SimH needs a model/portable library for shared
memory...

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