[Simh] Subtle H316 TTY interrupt bug? (Bob Supnik)
Adrian Wise
adrian at adrianwise.co.uk
Sat Jun 22 15:35:15 EDT 2013
Interesting question. This spurred me into action to get the ASR
interface from netlisted schematics to work with the H316 CPU that I've
had simulating for a while. In the process finding a few more bugs in
the schematics - both of the ASR interface and the CPU itself.
For the record you can see (an image of) simulation results illustrating
the point in question here:
http://www.series16.adrianwise.co.uk/hardware/images/ASR_simulation.png
running the code pasted below. (I've wound the baud rate up to 9600,
since the simulations take a *really* long time at 110 baud.)
(Or download the schematics and run it yourself, if you'd like to dig
around in a waveform viewer.)
So, I can confirm Bob Supnik's analysis, both in Verilog simulation, and
also ran it on real hardware (a DDP516).
Also I agree that my simulator, like simh, doesn't properly model the
Dummy cycle.
> From: "Bob Armstrong" <bob at jfcl.com>
> ...
> FWIW, I'm trying to resurrect some real H316 software that uses
exactly
> the OCP 104/ OTA 4 sequence described, so it's not entirely an academic
> concern.
It's probably worth pointing out that any program that actually relies
on this behaviour is itself faulty - it has a race.
The issue, to recap, is if you (with interrupts turned on and masked
correctly) put the ASR interface into output mode, and then immediately
write a character to the ASR interface. This is a race, because you're
gambling on reaching the OTA that outputs a character in the main thread
before the one in the interrupt service routine.
Most of the time you'll win - but we're working with interrupts turned
on, and if some other, unrelated, interrupt is serviced (or perhaps even
a DMA/DMC request is serviced) which places a significant delay between
the OCP to select output mode and the OTA, you'll lose - and the first
character output by the ISR (and probably several others too) will be
output before the one from the main thread.
It's also a really weird thing to want to do. If you've decided to put
the message you want printing in a buffer and use interrupts to print
it, why would you want to special-case the first character by sending it
from the main program?
Test program for code run in simulation:
ABS PAGE 1
0001 ABS
0002 ORG '1000
0003 01000 34 0104 SKS '104 READY?
0004 01001 0 01 01000 JMP *-1
0005 01002 14 0004 OCP '4 START IN INPUT
MODE
0006 01003 0 02 01027 LDA PINT
0007 01004 0 04 00063 STA '63 SET UP INTERRUPT
0008 01005 0 02 01053 LDA ='000040 BIT 11 SET
0009 01006 74 0020 SMK '20 SET MASK
0010 01007 140040 CRA
0011 01010 0 04 01030 STA CNT CLEAR COUNTER
0012 01011 000401 ENB ENABLE INTERRUPTS
0013 01012 0 35 01052 LDX =-200
0014 01013 0 12 00000 IRS 0 WAIT A BIT
0015 01014 0 01 01013 JMP *-1
0016 01015 34 0104 SKS '104 READY?
0017 01016 0 01 01015 JMP *-1
0018 01017 0 35 01052 LDX =-200
0019 01020 0 12 00000 IRS 0 WAIT A BIT
0020 01021 0 01 01020 JMP *-1
0021 01022 0 02 01051 LDA ='360 'P' - 4 HI
BITS, 4 LO
0022 01023 14 0104 OCP '104 OUTPUT MODE
0023 01024 74 0004 OTA '4
0024 01025 0 01 01024 JMP *-1
0025 01026 0 01 01026 JMP * WAIT FOR EVER
0026 *
0027 01027 0 001033 PINT DAC INTR
0028 01030 000000 CNT OCT 0
0029 01031 SA BSS 1
0030 01032 SK BSS 1
0031 *
0032 01033 0 001033 INTR DAC *
0033 01034 0 04 01031 STA SA
0034 01035 000043 INK
0035 01036 0 04 01032 STA SK
0036 01037 0 12 01030 IRS CNT
0037 01040 0 02 01050 LDA ='325 'U' -
ALTERNATE HI/LO BITS
0038 01041 74 0004 OTA '4
0039 01042 0 01 01041 JMP *-1
0040 01043 0 02 01032 LDA SK
0041 01044 171020 OTK
0042 01045 0 02 01031 LDA SA
0043 01046 000401 ENB
0044 01047 -0 01 01033 JMP* INTR
0045 01050 000325 END
01051 000360
01052 177470
01053 000040
ABS
PAGE 2
CNT 001030A INTR 001033A PINT 001027A SA 001031A
SK 001032A
0000 WARNING OR ERROR FLAGS
DAP-16 MOD 2 REV. C 01-26-71
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