[Simh] Always a new twist in the VAX
Bob Supnik
bob at supnik.org
Mon Apr 15 19:10:13 EDT 2019
In implementing the 8200, Matt Burke discovered an IPR (internal
processor register) that violated the original condition codes
specification for the VAX.
As originally specified, both MTPR and MFPR set N,Z based on the
transmitted/received longword data, cleared V, and left C untouched. The
simulator hardwired this (except for the standardized TBCHK register)
based on the CVAX microcode.
In the 8200, accessing the RXCD register sets V for character
sent/received. (The VAX vector MxPRs also return non-standard values for
the condition codes.) This is one of the reasons that, in 1986, the VAX
architecture spec was changed to make the condition codes UNPREDICTABLE
following MTPR or MFPR.
Accordingly, I've added a "hook" to support the 8200 and other
non-standard MxPRs: global variable mxpr_cc_vc.
At the start of MTPR or MFPR (only), this variable is set to 000<current
C bit>. MTPR will set N and Z based on the transmitted operand and clear
V and C. MFPR will set N and Z based on the received data and clear V
and C. Then, at the end, mxpr_cc_vc, masked down to V & C, is ORed into
the condition codes.
Thus, if an IPR write or read does nothing special, MTPR and MFPR will
get the canonical results. N,Z set, V cleared, C preserved. However, an
IPR routine can now specify a non-standard value for V and/or C by
modifying mxpr_cc_vc.
This tweak required changes only in vax_cpu.c. None of the
model-specific IPR routines need to be changed, except for Matt's 8200
RXCD code. Anyone attempting implementation of further models (or VAX
vectors) should be aware of this new capability.
/Bob Supnik
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