[Simh] DMA access to the IO page

[Lars Brinkhoff]

> Apparently, the GT40 does this. So... problems.

Yes, the boot ROM includes instructions for the VT11 display processor.

Admittedly, I'm quite clueless when it comes to details about the PDP-11
and Unibus.  The vt_fetch function in pdp11_vt.c does go through the I/O
map, but apparently that by itself isn't enough to access the ROM
region.  The GT40 is built on a 11/05 which doesn't have an I/O map,
right?

I worked around this by adding a direct call to iopageR.  It's a
temporary solution for running the GT40 ROM code, and as such it works.
I apologize if this makes anyone cringe.  I'll be happy to throw it out
when a real solution appears.

. . .

> CPUs, in general, didn't need to monitor DMA activity, except for
> systems with internal caches, like the 11/70.

I'll take this opportunity to also mention that I tested something
labelled "PDP-11/60, 70 Console/Diagnostic ROM".  It checks bit 0 in the
177752 register, which is related to the cache.  Doing "set hitmiss 1"
in SIMH makes the ROM happy, but I'm sure that's only an approximation
of the real hardware function.  Secondly, it retrieves an address from
704 and jumps to that address added by two.  I don't know what's
supposed to be there.