[Simh] PDP11 PCLK

[Lars Brinkhoff]

Hello,

The PDP-11 Dazzle Dart game sets the PCLK CSR to 115 (octal).  It
doesn't touch any other PCLK registers.  After this, it seems to expect
interrupts every 1/60th second.  SIMH computes the delay to be 1092
seconds.

The code is here.  It starts at START and programming the PCLK is on
line 313.

https://github.com/PDP-10/its/blob/master/src/bs/dazzle.68#L307

In my SIMH configuration, I just "set pclk enabled".

There's runnable code here, but you need to use my branch from the pull
request.

https://github.com/simh/simh/files/2702719/testing.zip
https://github.com/simh/simh/pull/642