[Simh] DEC VT emulators on MAME

Kevin Handy khandy21yo at gmail.com
Wed Apr 19 03:05:20 EDT 2017


Looking at the schematic of the terminal from
http://bitsavers.trailing-edge.com/pdf/dec/terminal/vt340/K-TC-VT340_Schematic_Feb87.pdf,
it appears that there are two 8031 processors. One (E57) uses the 'P1 AA'
bus and has the 51x8 nvrom, the other (E24) uses the 'P2 BA' bus.

64Kx8 ram seems to be shared between them.

1st guess, E57 does most of the heavy work (serial, uart, keyboard, etc),
and the other E24  handles the display.

Also, for chip select,there is a 'P1 AA15 H' and a'P1 AA15 L' on the
connector which should help with the chip selection logic. (ie. the
inverter is inside the terminal, not on the card).




On Tue, Apr 18, 2017 at 2:39 PM, Johnny Billquist <bqt at softjar.se> wrote:

> Ok, looked at the schematics now.
>
> On 2017-04-18 21:53, Timothe Litt wrote:
>
>>
>>
>> Since they're windowless, they are not EPROM (remember what the E
>>> stands for), but plain ROMs.
>>>
>> Nope.  I meant exactly what I wrote.
>>
>
> [...]
>
> Good point about it being the same chip. I hadn't considered that
> possibility. I know that for some 27-series proms, there were certainly
> both mask programmable as well as EPROM versions, where the mask
> programmable was more persistent safe. EPROMs have a risk of loosing their
> content eventually, even if not exposed to UV light.
>
> As for which signal you use for what - it doesn't matter.  OE puts the
>> chip into a low power state just as effectively as CS - assuming that
>> the part isn't in programming or ID mode.  Since the part is never
>> written (in the terminal), this effectively gives you 2 CS pins
>> (effectively ANDed), and thus decoding requires at most an inverter.
>>
>
> Not entirely true.
> OE should timing wise be done after CS and addresses have been stable for
> a certain time. And power consumption of the chip is related to the control
> of CS, and is not related to OE.
>
> While power consumption might not be a problem, and the timing can be
> solve, it does mean that driving CS and OE cannot be done identically. If
> you use OE as a CS, you should make make sure the address is stable some
> time before you activate OE, and if you use CS, you need to still drive OE
> at a point later in time, and not just tie them together or something.
>
> The 27C256 is a 32K x 8 part; it has no A15 (but the cartridge socket
>> does.)
>>
>
> Yes, that was obvious.
>
> Keven pointed out that the odd chip is probably the character generator
>> ROM - thus the separate address and data bus - and it doesn't need a CS
>> or OE.  It's always reading something.
>>
>> As I've written before, rather than guessing, a few minutes with an
>> ohmmeter can sort all this out.
>>
>> I'm leaving that - and further exploration - as an exercise to the reader.
>>
>
> I seriously doubt it's a character generator ROM in the normal sense of
> the word. The VT340 do not generate character output in hardware.
> It's a graphic terminal, which stores the text in the the bitmap, as far
> as I remember (I seem to remember being able to go into graphics mode and
> affect text already written). Also, you have soft definable characters, so
> the CPU need to have access to the same memory the character generator
> would use anyway, and it has to contain some RAM, minimum. So it needs to
> be in the normal memory space of the CPU.
>
> But there is indeed two address and databuses, so I think it's fair to say
> the two select lines are only used for a subset of the PROMs.
>
> There might be data in one ROM that is copied into RAM at startup.
> Character definition tables, for example, I could imagine.
>
> Anyway, most things can be worked out my doing the measurements you
> suggest, yes.
>
>
>         Johnny
>
> --
> Johnny Billquist                  || "I'm on a bus
>                                   ||  on a psychedelic trip
> email: bqt at softjar.se             ||  Reading murder books
> pdp is alive!                     ||  tryin' to stay hip" - B. Idol
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