[Simh] DEC VT emulators on MAME

Tue Apr 18 13:52:06 EDT 2017

I like that theory; it accounts for everything.  Duh.  I'd still take
the time with an ohmmeter to verify the theory.

Note that any emulation that actually wants to run the code will have to
get the bank switching logic right.

In any case, we all came to the conclusion that an adapter from the
cartridge to a programmer is the best approach. 

Assuming that one chip has its CS hardwired, hopefully its extra address
line goes to OE so that the databuses can be tied together.  Otherwise,
you're in to two DIP headers. 

I'm not sure how may variants of the cartridge were released.  You might
be able to salvage a connector from a terminal board so that you can
dump more than one...

In any case, have fun.

On 18-Apr-17 13:06, Kevin Handy wrote:
> A quick look at the schematics around the connector for this card,
> there are two sets of address/data lines. I'm guessing that one of the
> chips is for the character rom,and the other 4 are for the program. I
> haven't looked closer (using a tablet that's really painful with
> PDF's), so not 100% certain of the split.
> Thus the CS/OE is sufficient to handle the 4 program chips, and the
> other doesn't need any chip .selection lines.
>
> On Tue, Apr 18, 2017 at 9:12 AM, Timothe Litt <litt at ieee.org
> <mailto:litt at ieee.org>> wrote:
>
>     That part is easy - the high address (and bank) bits are probably
>     controlled by a hardware register.  Likely the lowest block
>     (perhaps 8/16/32K) is not bank switched (so the bank switch code
>     has a place to live). 
>
>     The rest is switched by writing the desired bank into the
>     register.  But there's also a 27256 on the terminal board, which
>     may be the static block.  In that case, all the ROM cartridge is
>     likely bank switched by the register.
>
>     The part Malcom needs to figure out is how the 5 hardware chips
>     are organized into chip selects onto the 2 address and 2 data
>     buses that come out from the connector.  This is a separate issue
>     from the logical banking.
>
>     There are 2 bank selects and one excess address bit.  Encoded,
>     that would give you 8 chips.  But that would require decoding
>     hardware on the cartridge.
>
>     Without a decoder, each chip has a CE and and OE.  So if a bank
>     select line goes directly to 2 roms' common CS, the extra address
>     bit can control output enable.  That scheme can work for 4 ROMs. 
>     But there are 5...
>
>     So either I missed a select line on the connector, or there's a
>     decoder on the ROM cartridge.
>
>     It's possible that the 5th ROM was a late addition (programmers
>     always need more code space), so an extra select line might have a
>     different name on the terminal control schematics.  (Renaming a
>     signal can have all kinds of ripple effects.)
>
>     Anyhow, I hope Malcom is successful.
>
>
>     On 18-Apr-17 10:59, Tim Stark wrote:
>>
>>     Ok, I now get it.  Since that it total 160K ROM space, 8031/8051
>>     can only access 64K space with 16-bit address lines. Let’s figure
>>     out how to access them  with bank select lines and write down
>>     which chip is on specific bank number.
>>
>>      
>>
>>     Tim
>>
>>      
>>
>>     *From:*Simh [mailto:simh-bounces at trailing-edge.com
>>     <mailto:simh-bounces at trailing-edge.com>] *On Behalf Of *Timothe Litt
>>     *Sent:* Tuesday, April 18, 2017 10:42 AM
>>     *To:* simh at trailing-edge.com <mailto:simh at trailing-edge.com>
>>     *Subject:* Re: [Simh] DEC VT emulators on MAME
>>
>>      
>>
>>     You can remove the ROMs (EPROMS) nondestructively with hot air. 
>>     But an easier approach would be to tack some wires onto the
>>     connector & wire them to a 28 pin DIP header.  Then your existing
>>     programmer can read them.
>>
>>     The schematics don't seem to contain the ROM module, but one can
>>     infer a lot from the connector.
>>
>>     It looks like there are 2 banks of ROMs on the cartridge; there
>>     are also 2 select lines.  Address bits go to A15; the 27c256 uses
>>     a0-a14.
>>
>>     So there are probably 2 chips on one bank, 3 on the other.  Since
>>     they don't write the EPROMs (they'e windowless, so OTP), they
>>     probably use A15 for OE and the bank lines for CS.  It's not
>>     obvious how the 5th chip is selected - perhaps there is a decoder
>>     on the card.  A couple of NAND gates, or perhaps a decoder to
>>     decode the 2 bank selects?  I didn't backtrack through the
>>     schematics to find out how the selects are generated.
>>
>>     In any case, some time with an ohmmeter should let you figure it
>>     out.  At worst you'd need 2 headers (1/bank), but most ROM
>>     programmers have strong drivers (address), and even 5 chips in
>>     parallel should be OK for the data bus.  So you can probably get
>>     by with 1, and some jumpers (or a dipswitch) to set A15/the BS
>>     for dumping each one.
>>
>>     DEC ROMs should have a checksum (or more likely, CRC), so you can
>>     verify that you dumped them correctly.  This would usually be in
>>     the last byte(s) of each chip - except where booting starts at
>>     the highest address.  (E.g. some Intel CPUs).  Then look at the
>>     beginning :-)
>>
>>     Have fun.
>>
>>     On 18-Apr-17 09:25, malcolm at avitech.com.au
>>     <mailto:malcolm at avitech.com.au> wrote:
>>
>>         Just a quick update: I've broken open the VT340 ROM cartridge.  Inside are 5 x surface-mount N27C256 ROMs.
>>
>>          
>>
>>         Some pictures of the ROM cartridge are now included on this page -> http://avitech.com.au/?p=1818 
>>
>>          
>>
>>         Is there anyone who has the tools, time and interest to remove these ROMs and dump the contents?  If so, please let me know and I will pay the cost of shipping to get this cartridge to you.
>>
>>          
>>
>>         Malcolm.
>>
>>          
>>
>>          
>>
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>>      
>>
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