[Simh] Configuring DMC11 Devices

[Mark Pizzolato]

On Tuesday, January 5, 2016 at 5:23 PM, Paul Koning wrote:
> > On Jan 5, 2016, at 4:59 PM, Mark Pizzolato <Mark at infocomm.com> wrote:
> >
> > ECOCHK:	MOV	R0,-(SP)	;PRESERVE THE UNIT # *2
> > 	CLR	R0		;SET A STARTING ADDRESS
> > 	MOV	#3,R4		;TWO CHANCES TO MATCH MICRO-CODE (2
> BITS)
> > 	MOV	#HICOD,R1	;HIGH SPEED MICRO CODE ADDRESS
> > 	MOV	#LOCOD,R2	;LOW SPEED MICRO CODE ADDRESS
> > 10$:	MOVB	#ROMI,BSEL1(R3)	;SET UP FOR A ROMI
> > 	MOV	#100400,-(SP)	;SET THE INSTRUCTION TO USE
> > 	BIS	R0,(SP)		;  AND NOW THE ADDRESS
> > 	MOV	(SP)+,SEL6(R3)	;PUT THE INSTRUCTION IN,
> > 	BISB	#MSTEP!ROMI,BSEL1(R3) ;  AND EXECUTE IT
> > 	MOVB	#ROMO,BSEL1(R3)	;NOW CLEAR THE BITS
> > 	MOV	SEL6(R3),R5	;GET THE MICRO-CODE FROM THAT ADDRESS
> > 	CLRB	BSEL1(R3)	;AND CLEAR THE CSR
> > 	CMP	R5,(R1)+	;MATCH THE HIGH ONE?
> > 	BEQ	20$		; YES, SO CONTINUE
> > 	BIC	#1,R4		;NOT HIGH SPEED, SO CLEAR THE HIGH SPEED
> BIT
> > 20$:	CMP	R5,(R2)+	;MATCH THE LOW ONE?
> > 	BEQ	30$		; YES, SO CONTINUE
> > 	BIC	#2,R4		;NOT LOW SPEED SO CLEAR THE LOW SPEED
> BIT
> > 30$:	TST	R4		;DID EITHER ONE MATCH?
> > 	BEQ	100$		;NEITHER ONE MATCHES, SO QUIT RIGHT
> NOW
> >
> > We've got 5 instructions in a row referencing the device registers.  A write,
> a read-modify-write, a write, a read and a write.
> >
> > I'm a software guy who knows how to simulate things.  I don't know how
> > the real hardware works, but unless there is some sort of interlocked
> > behavior with the DMC microcontroller it would seem that a sufficiently fast
> > PDP11 would get ahead of the DMC.  No?
> 
> The thing to keep in mind is that BSEL1 is implemented in logic; it's not like
> the higher numbered registers that are just a dual ported memory
> manipulated by the KMC11 microcode.  The KMC11 reference manual spells
> some of this out; for example, you can't make sense of MSTEP and ROMI
> references in the driver from the DMC11 manual, you need the KMC11
> manual for that.

Along with Tim's strong declaration that the DMC/DMR devices are merely 
KMC devices with code running from RAM instead of ROM.

So immediate completion makes sense, but it certainly wasn't how those activities 
were interpreted when this work was done originally.  This fact along with the 
detail that Tim points out that the KMC is faster than the actual bottleneck 
(the Unibus) will reliably make the BSEL1 operations complete in one instruction 
without regard to the speed of the PDP11 CPU.

Thanks.

- Mark