[Simh] pdp-11 register side effects and traps

[Brad Parker]

Hi all,

I have been running the pdp-11/34 trap diag FKABD0 on various sims and
simulated hardware and I have a question about register side effects and
traps.

I get the impression that one of the tests in FKABD0 (103) relies on the
fact that registers side effects, specifically post increments, don't
happen if a bus error occurs. (or maybe I'm totally confused)

Is this true of 'real hardware'?  If a bus error occurs on say

   tstb (r0)+

does r0 remain unincremented?

It's not true in simh.  But it probably doesn't matter as I'll be no one
relies on that behavior, other than this diag :-)

I could see how the microcode could just skip over that part if a bus
timeout occurs.

-brad