[Simh] RSTS/E gets wrong clock rates on KDJ11B,D,E

[Bob Supnik]

As reported before, RSTS/E gets the wrong clock rate for the KDJ11B, D, 
and E, because it runs a timing loop to see how fast ticks are, and the 
simulator is way faster than any J11.

I have a partial solution for that, and it will be implemented in the 
next release.  For the KDJ11B and E, you will be able to specify that 
the 60Hz crystal clock, rather than line frequency, is to be used.  This 
will cause RSTS/E to skip its attempt at clock calibration and see 60Hz 
as 60Hz.

The new command is

SET SYSTEM JCLK_DFLT {0/1/2/3}

This causes the JCLK value (JCSR<11:10>) to be initialized to the given 
values, corresponding to line, 50hz, 60hz, 800hz.  So to force 60Hz 
detection, the sequence would be:

SET SYSTEM JCLK_DFLT 2
BOOT <disk>

This corresponds to one of the many configuration commands in the KDJ11B 
and E's built-in firmware.

I don't have an answer for the KDJ11D.

/Bob Supnik