[Simh] PDP-11 MUL / DIV Bug

[Ludwig TAUER]

On Tuesday, 18 September 2018 16:41:36 CEST Paul Koning wrote:
> > On Sep 18, 2018, at 10:35 AM, Ludwig TAUER <tauer at aon.at> wrote:
> > 
> > Hi folks!
> > 
> > Seems I have found a bug in the PDP-11 emulating the
> > MUL instruction.
> > 
> > The current code takes the specified register as source
> > instead of the register pair R and R+1 if the register is even.
> 
> The current code is correct: mul takes 16 bit inputs, and delivers a 32
> bit result if the register is even, the low 16 bits if it is odd.

OK. Your point. Sorry, memory is fading...

> > The DIV instruction is also invalid, but the other way around:
> > if R is odd, R is duplicated into the high half of the 32 bit int.
> 
> Odd R for div is a strange thing to do.  I'm not sure what it is supposed
> to do, the manuals are not at all clear.  What do you believe is
> correct, and what document says so?

Just reviewed PDP-11 Processor Handbook pdp11/04/34a/44/S0/70, 1979
freshly and indeed there was no mention of it. Again you are right.

I remembered using it that way when I ran out of registers and
stack space. But as it turns out to never trust your memories.

Sorry for the noise!

Ludwig TAUER