[Simh] Another PDP11 "approximation" (was: DMA to IO page)

[Bob Supnik]

The discussion about the peculiarities of accessing the MK11 CSRs shows 
another limitation of SimH for Unibus systems: the Unibus memory space 
part of the address space of an 11/70 simply isn't there. The ReadB/W 
and WriteB/W routines in the CPU are very simple: if it's memory, it's 
in the M array; if it's in the IO page, it's accessed via a device 
dispatch routine. Anything in between is NXM. There's no provision for 
configuring or accessing Unibus memory or, worse yet, "reflecting" a 
Unibus memory space operation back into real memory to get at CSRs. And 
max memory is 4088KB, not 3840KB.

Again, this reflects the Qbus (and specifically, the KDJ11A) origins of 
the PDP11 simulator. In a 22b Qbus system, everything except the last 
8KB is memory space. In fact, a Qbus system can have (electrically) a 
full 4096KB of memory, and DMA devices can access all of it, because 
unless BBS7 is asserted, everything is memory, and the address space is 
flat.

While the 11/70 required a convoluted "reflection" of CSR accesses back 
into memory space, later Unibus maps (like the 11/24 and 11/44) solved 
this problem more simply, by sending IO space addresses out on the 22b 
private memory bus as well as the Unibus. Except for the memory CSRs, 
these addresses are ignored. If the memory bus responds to an IO page 
reference, the Unibus operation is stopped; there is no Unibus NXM. No 
reflection logic is required or implemented. According to the 11/70 
documentation, a later "modification" of the CPU allowed this same 
approach to be used on the 11/70.

So what does this mean, in practice?

- Except for an unmodified 11/70, accessing memory CSRs just requires 
the current IO page dispatch methods. The simulator has no concept of 
"memory bus" vs "Unibus" (or internal registers versus Unibus); anything 
in the IO page is accessed the same way, which is just fine. Of course, 
none of the memory CSRs are implemented anyway.

- Unless there's a use case for Unibus memory on a 22b Unibus system, I 
don't see any point in adding it.

- If you want to improve the fidelity of the simulation a bit, the "4M" 
memory size setting could be adjusted to 3840 vs 4088, for U vs Q, in 
the cpu_set_size routine.

/Bob Supnik