[Simh] CMP R3,(R3)+
Timothe Litt
litt at ieee.org
Mon Jul 30 14:22:28 EDT 2018
On 30-Jul-18 11:45, Johnny Billquist wrote:
> On 2018-07-30 15:51, Timothe Litt wrote:
>> On 30-Jul-18 09:30, Paul Koning wrote:
>>> Yes, that is the standard way to do this. I have never seen the
>>> code you quoted before and I can't imagine any reason for doing that.
>> A memory address test's verification pass. Check that memory
>> contains address of self. Of course, you need a
>>
>> bne fail
>> following the compare :-)
>
> Not to mention that it will succeed or fail depending on which PDP-11
> model you run the code on? :-)
Oddly enough, we did have quality control, and it usually worked.
Diagnostics are often CPU-specific. This was fixed after the 11/20.
I might have done this - it represents a 40% savings in instructions for
the loop:
;11/20 safe Many other
11s Some other 11s
10$: movr3, r0 10$: cmp r3,(r3)+ 10$: cmp r3,(r3)+
cmp r0, (r3)+ bne fail
bne fail
bne fail sob r1,
10$ dec r1
dec
r1
bne 10$
bne 10$
20-40% reduction in instructions of an inner loop at boot time is worth
a runtime check
for the 11/20 - if I cared (e.g. a BIST is probably in
processor-specific ROM, so no need to check).
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