[Simh] PDP-10 Home Block and KS10 Boot Code
Timothe Litt
litt at ieee.org
Fri May 29 05:06:55 EDT 2015
On 29-May-15 03:26, Cory Smelosky wrote:
> On Fri, 29 May 2015, Rob Doyle wrote:
>
>>
>> I was looking at the KS10 boot code in SIMH.
>>
>> The boot code looks for the Primary Home Block in disk block 1 and
>> Secondary Home Block in disk block 8.
>>
>> /* movei 2,10 ; blk #10 */
>> /* jsp 17,rdbl ; read */
>> /* movs 3,1000 ; id word */
>> /* caie 3,sixbit /HOM/ */
>>
>> It looks to me like the Secondary Home Block is 10 (decimal)
>> not 10 (octal). I see it at offset 10240 (decimal) in the disk image.
>>
>
> 2400/ HOM
> 2401/ USER0
> 2402/
> 2403/ ______
> 2404/ USER
>
> I also see it at 2400 octal
>
>> Is the SIMH boot code correct?
>>
Depends. I found this issue a couple of years ago and
changed SimH.
You really should use current sources as your reference, or you'll
keep finding old bugs/omissions...
The story is a bit more complicated than "yes" or "no".
The 8080 (KS console) has a typo; it reads block ^O10 instead of
^D10. No-one noticed, because a bad primary HOM block with
a good alternate is really unusual. Unformatted/unrefreshed
disks are expected to have both bad. So it's easy to see how it
went unnoticed. And Rp06/RM03 disks have better ECC than
their predecessors.
SimH copied this bug. I didn't look at the code until I was fixing
another (pure) SimH omission.
The change that I made was to still read block 8; it should never
validate, but I decided that it was best to replicate the hardware
in case some non-DEC software made the same mistake and relied
on it. (e.g. ITS) When block 8 fails to validate, the code reads the
correct secondary block, block 10.
That ensures that an image of a real disk with a defective primary HOM
block will boot.
Block 8 is part of the region where BOOTS/BOOT (the secondary bootstrap
that prompts) lives.
Note that the real 8080 does NOT load PDP-10 code into memory to read the
HOM blocks. It manipulates the RH11 registers directly, so it does not
have the ucode dependency. SimH has these code snippets because it can't
easily do flip register bits without code. I'm not sure that the
address that
Bob used is entirely safe. (There's no good place. Some things are stashed
across boots.) But we haven't hit that issue yet because recent TOPS-10
actually keeps BOOT is memory, so unless that copy is corrupted, the
console isn't involved after power-on.
After reading the HOM blocks, the 8080 uses pointers to find the OS
bootstrap,
reads it into 1000, and transfers control. This is what the SimH boot
code
emulates. Those pointers are setup by smfile. There are actually two
sets of
pointers, one for diagnostics and one for the real OS. SimH only deals
with the
latter. Rob's hardware's console should be more complete.
See below.
>> I'm guessing that it never fails over to the secondary home block so
>> nobody ever noticed.
>>
>
> File: dskb:/u/p
> [Patching structure DSKB]
>
> 200/ HRLI 17,0(15) $6T
> 201/ DSKB0
> 200/ HOM "/WOM/
> 201/ DSKB0 "/MUPPET/
> 203/ ^Z
>
> % RPA0 first HOM block consistency error
> Startup option:
>
>
>
>> Rob.
>
/* Device bootstrap
* The DEC and ITS versions are word-for-word identical, except that
* the DEC RDIO/WRIO are replaced by IORDQ and IOWRQ. This is hand
* assembled code, so please always make changes in both.
* Due to a typo in the KS Console rom, block 010 is read for the
* alternate HOM block. The correct block is 012. For compatibility,
* we will do what the hardware did first, what's right if it fails (as
it will).
*/
#define BOOT_START 0377000 /* start */
#define BOOT_LEN (sizeof (boot_rom_dec) / sizeof (d10))
static const d10 boot_rom_dec[] = {
INT64_C(0510040000000)+FE_RHBASE, /* boot:hllz 1,FE_RHBASE ;
uba # */
INT64_C(0201000140001), /* movei 0,140001 ;
vld,fst,pg 1 */
INT64_C(0713001000000)+(IOBA_UBMAP+1 & RMASK), /* wrio
0,763001(1); set ubmap */
INT64_C(0200040000000)+FE_RHBASE, /* move 1,FE_RHBASE */
INT64_C(0201000000040), /* movei 0,40 ;
ctrl reset */
INT64_C(0713001000010), /* wrio 0,10(1) ;
->RPCS2 */
INT64_C(0200240000000)+FE_UNIT, /* move 5,FE_UNIT ;
unit */
INT64_C(0713241000010), /* wrio 5,10(1) ;
select ->RPCS2 */
INT64_C(0712001000012), /*10 rdio 0,12(1) ;
RPDS */
INT64_C(0640000010600), /* trc 0,10600 ;
MOL + DPR + RDY */
INT64_C(0642000010600), /* trce 0,10600 ; */
INT64_C(0254000377010), /* jrst .-3 ;
wait */
INT64_C(0201000000377), /* movei 0,377 ;
All units */
INT64_C(0713001000016), /* wrio 0,16(1) ;
Clear on-line attns */
INT64_C(0201000000021), /* movei 0,21 ;
preset */
INT64_C(0713001000000), /* wrio 0,0(1) ;
->RPCS1 */
INT64_C(0201100000001), /*20 movei 2,1 ;
blk #1 */
INT64_C(0265740377041), /* jsp 17,rdbl ;
read */
INT64_C(0204140001000), /* movs 3,1000 ; id
word */
INT64_C(0306140505755), /* cain 3,sixbit /HOM/ */
INT64_C(0254000377032), /* jrst pg ;
match */
INT64_C(0201100000010), /* movei 2,10 ;
blk #10 */
INT64_C(0265740377041), /* jsp 17,rdbl ;
read */
INT64_C(0204140001000), /* movs 3,1000 ; id
word */
INT64_C(0302140505755), /*30 caie 3,sixbit /HOM/ */
INT64_C(0254000377061), /* jrst alt2 ;
inv home */
INT64_C(0336100001103), /* pg: skipn 2,1103 ; pg
of ptrs */
INT64_C(0254200377033), /* halt . ;
inv ptr */
INT64_C(0265740377041), /* jsp 17,rdbl ;
read */
INT64_C(0336100001004), /* skipn 2,1004 ;
mon boot */
INT64_C(0254200377036), /* halt . ;
inv ptr */
INT64_C(0265740377041), /* jsp 17,rdbl ;
read */
INT64_C(0254000001000), /*40 jrst 1000 ;
start */
INT64_C(0201140176000), /* rdbl:movei 3,176000 ; wd
cnt 1P = -512*2 */
INT64_C(0201200004000), /* movei 4,4000 ; 11
addr => M[1000] */
INT64_C(0200300000002), /* move 6,2 */
INT64_C(0242300777750), /* lsh 6,-24. ; cyl */
INT64_C(0713141000002), /* wrio 3,2(1) ;
->RPWC */
INT64_C(0713201000004), /* wrio 4,4(1) ;
->RPBA */
INT64_C(0713101000006), /* wrio 2,6(1) ;
->RPDA */
INT64_C(0713301000034), /*50 wrio 6,34(1) ;
->RPDC */
INT64_C(0201000000071), /* movei 0,71 ;
read+go */
INT64_C(0713001000000), /* wrio 0,0(1) ;
->RPCS1 */
INT64_C(0712341000000), /* rdio 7,0(1) ;
read csr */
INT64_C(0606340000200), /* trnn 7,200 ;
test rdy */
INT64_C(0254000377053), /* jrst .-2 ;
loop */
INT64_C(0602340100000), /* trne 7,100000 ;
test err */
INT64_C(0254200377057), /* halt . */
INT64_C(0254017000000), /*60 jrst 0(17) ;
return */
INT64_C(0201100000012), /*alt2: movei 2,10. ;
blk #10. */
INT64_C(0265740377041), /* jsp 17,rdbl ;
read */
INT64_C(0204140001000), /* movs 3,1000 ; id
word */
INT64_C(0302140505755), /* caie 3,sixbit /HOM/ */
INT64_C(0254200377065), /* halt . ;
inv home */
INT64_C(0254000377032), /* jrst pg ;
Read ptrs */
};
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