[Simh] Is Alpha AXP in SIMH's future?

lists at openmailbox.org lists at openmailbox.org
Wed Mar 4 02:16:25 EST 2015


On Tue, 3 Mar 2015 13:34:51 -0800
Sergey Oboguev <oboguev at yahoo.com> wrote:

> My comment was is not about Intel vs. non-Intel, but about having 64-bit
> as a native type in host machine instructions and leveraged by the
> compiler, rather than simulated by 32-bit host operations.

I thought there was no direct way to do math on 64 bit integers in 32 bit
Intel and simulation by 32 bit host operations (add, adc) would be
required, as opposed to other platforms which (I believe) have instructions
for 64 bit integer math even in 32 bit mode (i.e. SPARC).

> Just consider how let us say LDQ or ADDQ would actually be implemented
> in each of the respective cases.

Looking further MIPS seems to have the same limitation as Intel so I must
have remembered this wrong and SPARC is the exception rather than the rule.
Sorry for the tangent.


> 
> ________________________________
> From: "lists at openmailbox.org" <lists at openmailbox.org>
> To: "Simh at trailing-edge.com" <Simh at trailing-edge.com> 
> Sent: Tuesday, March 3, 2015 12:56 PM
> Subject: Re: [Simh] Is Alpha AXP in SIMH's future?
> 
> 
> Hi,
> 
> I don't understand (a) unless this is referring specially to Intel. For
> (b) I didn't imagine needing so much memory for a guest.
> 
> Right now I'm running SIMH on a MIPS III (64 bit) box under OpenBSD and on
> Solaris SPARC (sun4u). SIMH builds and runs on everything I have. I don't
> use Windows and my Linux box is 32 bit for a few things that don't run
> elsewhere. From my view it would be fantastic to have SIMH support an
> Alpha emulator because SIMH doesn't require particular hosts.
> 
> 
> On Tue, 3 Mar 2015 12:44:03 -0800
> Sergey Oboguev <oboguev at yahoo.com> wrote:
> 
> > The downside of running a 32-bit version of virtually any AXP simulator
> > is that it is bound to be 2-3 times slower than 64-bit version, due to
> > 
> > (a) simulation of AXP 64-bit operations on top of 32-bit host
> > operations,
> > 
> > (b) indirect access to guest memory when it is sized above 2 GB or so
> >     assuming such an access is implemented at all.
> > 
> > The only exception to (a) would be a 64-bit simulator squeezed into
> > 32-bit environment running on 64-bit machine, but this is hardly worth
> > the effort.
> > 


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