[Simh] TOPS-20 Source with KMC11 Driver Code?

Timothe Litt litt at ieee.org
Sun May 19 06:26:14 EDT 2013


A couple of other things come to mind (naturally, after pushing 'send'):

Initialization will load/verify the microcode.  That has to work.

After setting RUN and the interrupt enables, expect base-in and 
control-in command to establish the DUP CSR address, buffers, line 
mode/enable.  These require that the KMC respond to KMCRQI by initiating 
an A vector interrupt.

Besides RDIO and WRIO, there are bit test (TIOx) , bit set (BSIO) and 
bit clear (BCIO) instructions that also touch the KMC.

For better directed hints, I'd need more detail on what is and isn't 
happening.

This communication may not represent my employer's views,
if any, on the matters discussed.

On 19-May-13 04:53, Robert Jarratt wrote:
>> -----Original Message-----
>> From: simh-bounces at trailing-edge.com [mailto:simh-bounces at trailing-
>> edge.com] On Behalf Of Rich Alderson
>> Sent: 08 May 2013 01:02
>> To: hecnet at update.uu.se; simh at trailing-edge.com
>> Subject: Re: [Simh] TOPS-20 Source with KMC11 Driver Code?
>>
>>> From: "Robert Jarratt" <robert.jarratt at ntlworld.com>
>>> Date: Tue, 7 May 2013 23:33:36 +0100
>>> Can anyone point me at the right place to look at TOPS-20 driver code
>>> for the KMC11? I can see that it is trying to get the Microprocessor
>>> to do something and read back some values, but I don't know what
>>> values it wants to get and so it reports:
>> Hi, Rob,
>>
>> http://pdp-10.trailing-edge.com/tops20v41_monitor_sources/index.html
>>
>> You want the file KDPSRV.MAC in that directory.
>>
>>                                                                  Rich
>> _______________________________________________
>> Simh mailing list
>> Simh at trailing-edge.com
>> http://mailman.trailing-edge.com/mailman/listinfo/simh
>
> I am making some progress with getting the KMC/DUP emulation working in SIMH
> for TOPS-20. At the moment I am stuck on one thing, which is the interrupts
> to tell the OS that the KMC has processed a buffer. The OS sets the
> interrupt enable bit and when I have something to report to the OS I set the
> relevant interrupt bit. However, nothing happens when I do that. I am
> wondering if I have the right interrupt bit? I am using bits 8 and 9
> (decimal).
>
> I am not sure how to find out which bit I should be setting.
>
> Can anyone help?
>
> Regards
>
> Rob
>
> _______________________________________________
> Simh mailing list
> Simh at trailing-edge.com
> http://mailman.trailing-edge.com/mailman/listinfo/simh


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