[Simh] PDP-11 GCC cross-assembler... posible bug... or is just me?

[Jordi Guillaumes i Pons]

Hi list,

I've jumped into what seems to be a bug in the gnu binutils assembler. 
I've already submited a report:

http://sourceware.org/bugzilla/show_bug.cgi?id=14480

To cut the story short, the assembler does not trigger deferred indirect 
mode unless the index is specifically written in the instruction. So 
this instruction:

     JSR    PC,@(R0)

Assembles exactly equal that this one:

     JSR    PC,(R0).

If the source code is:

     JSR    PC, at 0(R0)

then the assembled code is correct.

The problem with this bug (if it is really a bug) is the gcc compiler 
generates the incorrectly handled instruction if you try to use a 
function pointer table and enable size optimization (-Os option).

The other possibility is I'm not understanding at all the PDP-11 
addressing modes and the assembler is working as it should do... Could 
anyone enlighten me about this?


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