[Simh] visualizing processors?

[Howard M. Harte]

It would be nice if there was a general way to do this.  What I have  
done for TX-0 simulation is to add DEBUG flags to the CPU device.   
When enabled, the instruction processing loop prints out verbose  
information about registers before and after instruction execution.  I  
also added counters, so I can see which instructions are being used  
for a particular program.

One idea might be to make a simulated JTAG interface, and then use  
GDB.  That might be nice for CPU's which are supported by GDB, like VAX.

I've also thought about doing something similar for the Z80  
simulator.  Zilog has the ZDS-II IDE which has a nice debugger.  I  
reverse-engineered the protocol, so it would be possible to create a  
DLL that gets loaded by ZDS-II and communicates with SIMH instead of a  
real CPU.

-Howard


On Mar 1, 2009, at 2:51 AM, Richard <legalize at xmission.com> wrote:

> Are there any plans to support visualization of processors in simh?
>
> By visualization, I mean some sort of representation of the processor
> state that updates automatically when I single step, etc.   Whether
> this is done with a curses type display or a GUI isn't so important.
> -- 
> "The Direct3D Graphics Pipeline" -- DirectX 9 draft available for  
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