[Simh] SIMH handling of G floating indexed operands -- poor man's fix

[bsupnik at comcast.net]

Andreas,

What you've done will work.

The only "MQ" operands are {ADD|SUB|MUL|DIV}{D/G}2 and ACB{D/G}.  For all of those instructions, no state is modified before the write of the MQ operand is attempted with WA privileges.  If the operand is writeable, the instruction will fault without modifying state.  Thus, changing the MQ reads to use RA instead of WA is safe.

The permanent fix will do a full split out of the 'special' operands and not rely on this, because the CVAX microcode that the simulator is based on did use a WA test in the specifier flows.  Software can't tell the difference, but I like to keep things accurate and tidy.

In the meantime, anyone who needs Andreas' patch can use it safely.

/Bob Supnik

> Message: 3
> Date: Tue, 14 Aug 2007 14:28:33 +0200
> From: "BMLV / LRUE / EDV Si" <lrue.edv.si at bmlv.gv.at>
> Subject: Re: [Simh] SIMH handling of G floating indexed operands --
> 	poor	mans fix
> To: <simh at trailing-edge.com>
> Message-ID: <000f01c7de6e$a114eb20$0283e00a at ZE083006>
> Content-Type: text/plain;	charset="iso-8859-1"
> 
> Thanks for the hint,
> 
> changed line 1453 and 1454 in vax_cpu.c ('/* index */' section case MQ:) the
> 'write access' WA to 'read access' RA in both read statements.
> My g_float indexed access problem is fixed - no side effects yet.
> 
> Andreas Huemer